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Wafer Flatness Measurement
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- Si, Sapphire, GaAs, SiC, GaN, LN, Quartz etc
- Sawing, Lapping, Polishing
- Process Development and IQC&OQC
- UltraSort150&200, FM200Wafer, FM-MSP300
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Mask(Reticle) Flatness Measurement
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- Quartz(Glass) non-contact flatness measurement system
- Blank, Pellicle mounted mask and EUV mask
- FM200Mask, UltraFlat
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Single Wafer Wet Processing
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- Cleaning Processors
- Solvent Processors
- Wet Etch Processors
- Developer
- Spin & Spray Coater with Bake Processing
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LED Metal Lift Off
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| Dry-in/-out Solvent Strip and Lift-off Processing
SSEC combines immersion batch soak and single wafer spray solvent processing in one completely enclosed, fully automatic system. The chart below includes
applications for SI wafers and III-V semiconductors including GaAs, InP, GaN, GaP, sapphire, and SiC and glass wafers.
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TSV Clean
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| TSV RESIST AND RESIDUE REMOVAL
3D integration is the most active methodology for increasing device performance. The ability to create Through Silicon Vias (TSV) provides the shortest
path for interconnections and will result in increased device speed and reduced package footprint. There are many approaches and process flows for
creating TSVs. These include Via-First, Via-Middle, Via-Last, Via After Bonding. The size and aspect ratio of the via will vary depending upon when the
via is formed. The creation of the via by a Deep Reactive Ion Etch Process (DRIE) and the need to clean post etch is required for all scenarios.
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CDE-ResMap
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| - Four Point Probe
- Resistivity Mapping Systems
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VLSI Standards Incorporated
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- ACCURATE standards - traceable to SI units through NIST
- 30 YEARS of innovation supporting the ITRS road map
- The ANSWER to your quality plan
- 5 CATEGORY Products and Recertification
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Wafer Roughness Measurement
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FlatMaster Ra
-White light interferometer
-Roughness Measurement
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